Integrated Circuits And Systems Group
from web site
ICSG faculty have developed a Master’s Degree Program in Built-in Circuits and Systems to serve the working professionals of the Austin area. Tailored for busy schedules, the two-12 months program offers the distinctive opportunity to pursue a master’s diploma whereas persevering with to work full-time. Upon completion of all the program requirements, a student is awarded a Master of Science in Engineering diploma with a serious in Electrical and Computer Engineering and a focus in Built-in Circuits and Techniques. This system is administered by the middle for Lifelong Engineering Training (CLEE).
Courses in Regular ECE Program
The ICSG faculty teach courses at the undergraduate and graduate ranges that span the whole house of IC design and design methodology.
UNDERGRADUATE
EE338L
Analysis and design of analog integrated circuits; transistor fashions, built-in circuit applied sciences; format techniques; mismatches; easy and advanced current mirrors, single-stage amplifiers; differential-pair amplifiers; frequency response; noise concerns; feedback; nonlinear circuits; cascode amplifiers; telescopic and folded-cascode operational amplifiers; two-stage operational amplifiers utilizing state-of-the-art EDA/CAD instruments for design simulation and format.
EE360M
DIGITAL Programs DESIGN Utilizing VHDL
Hardware implementation of arithmetic and other algorithmic processes; hardware description languages (VHDL); group, design, and simulation of digital techniques.
EE360R
Pc-AIDED INTEG CIRCUIT DESIGN
Concept and observe of built-in circuit design. 10M16DAF484I6G of chip design, chip partitioning, and architecture; pc-aided design tools for simulation and bodily design
EE360S
DIGITAL Built-in CIRCUIT DESIGN
Circuit-degree points of steel oxide silicon (MOS) and bipolar built-in circuit applied sciences. Logic gates and latches; propagation delays; circuit simulation fashions.
EE379K
ANALOG ICS FOR COMMUNICATION Programs
Device fashions, small-signal circuit analysis, noise and distortion in devices and circuits, including relevant metrics; biasing strategies, voltage references, current sources and biasing for low-noise applications; amplifier design methods for low noise, variable gain amplifiers, energy amplifiers; built-in mixers; and built-in oscillators.
GRADUATE Courses
EE382M-1
VLSI TESTING
Hardware and software reliability evaluation of digital programs; testing, design for testability, self-prognosis, fault-tolerant logic design, error-detecting and error-correcting codes.
EE382M-10
SYNTHESIS OF DIGITAL Techniques
Automatic generation of gate-degree implementations from HDL specs; optimization of two-stage, multilevel, and sequential circuits for area, speed, and testability.
EE382M-11
VERIFICATION OF DIGITAL Techniques
Automated verification of digital techniques; formal fashions and specs, equivalence checking, design verification, temporal logic, BDDs, logical foundations, automata theory, current developments
EE382M-12
SYSTEM DESIGN METRICS
Analysis of design at chip, board, and system ranges; life cycle implications of design choices, including design for testability results on manufacturing and subject service; financial and buyer-driven components
EE382M-14
ANALOG Integrated CIRCUIT DESIGN
Design and implementation of analog built-in circuits (ICs) focusing on transistor-degree design of circuits utilizing the trendy semiconductor fabrication processes, notably CMOS. The blocks and circuit architectures discussed on this course are the core elements of most integrated systems and important in applications akin to communications, multimedia, imaging, sensors, and biomedical.
EE382M-2
Dependable COMPUTING
Design methods for dependable, fault-tolerant, fail-protected and fail-delicate systems; fault prognosis and fault avoidance strategies at program and system ranges; experimental and industrial fault-tolerant computer techniques.
EE382M-7
VLSI TESTING:
VLSI I: CMOS expertise; structured digital circuits; VLSI systems; computer-aided design tools and principle for design automation; chip design.
EE382M-8
VLSI II
Microelectronic methods structure; VLSI circuit testing methods; integration of heterogeneous pc-aided design instruments; wafer scale integration; advanced excessive-pace circuit design and integration.
Radio Frequency Built-in Circuit Design
Design and analysis of RF and analog ICs, together with an outline of noise and distortion in devices and circuits; biasing strategies including voltage references, present sources and biasing for low-noise functions; amplifier design methods for low noise, variable acquire, excessive output energy and high dynamic range; integrated mixers and other frequency converters; rectifier circuits; and built-in oscillators for generating fastened and variable frequencies.
CAD DEEP SUB
Overview of the CAD move; fundamentals of logic synthesis; graph theory and computational complexity; partitioning; floorplanning and placement; international and detailed routing; static timing analysis and delay modeling; timing closure and physical synthesis; noise sources in timing evaluation and PD; CAD for manufacturability; statistical timing evaluation and statistical circuit optimization
NANOSCALE IC DESIGN
CMOS technology and design scaling; nanometer transistors and their models; design time energy optimization (circuit-level techniques, structure, interconnect, reminiscence); standby-mode power optimization (circuits and systems, reminiscence); runtime power optimization (circuits and programs); sources of variability; statistical information assortment and analysis of variance; statistical circuit simulation and timing analysis; manufacturability and decision enhancement methods.
EE382V:
SYSTEM-ON-A-CHIP DESIGN-ICS
Concepts, points, and means of system-level design of embedded programs, i.e., hardware-software program co-design & co-verification; modeling and specification of an embedded system at a excessive stage of abstraction; use of co-simulation to validate system performance; analysis of purposeful and nonfunctional efficiency of the system early in the design process to support design choices; evaluation of hardware/software tradeoffs, algorithms, and architectures to optimize the system based mostly on requirements and implementation constraints.
EMBEDDED SYSTEM DESIGN AND MODELING
This course presents state-of-the-artwork methods, instruments and methods for system-degree design and modeling of complete multi-processor systems from specification all the way down to implementation across hardware-software boundaries. Utilizing the SpecC language and the System-On-Chip Environment (SCE), we'll specify, simulate, analyze, model and design systems primarily based on examples of typical embedded purposes.
VLSI Bodily DESIGN AUTOMATION
Fundamentals of bodily design, the technique of reworking structural illustration of a VLSI system into structure illustration. This course focuses on design automation issues together with: logic partitioning, floorplanning, placement, world routing, detailed routing, clock and power routing, and new developments in bodily synthesis. Optimization methods, corresponding to graph principle, community flow, Steiner tree, simulated annealing, generic algorithm, and linear/convex programming are also coated.
EE382V
OPTIMIZATION Points IN VLSI CAD
As CMOS scales into deep submicron dimensions, VLSI designs are interconnect-dominated for the overall chip performance, cost, and reliability. The resulting design closure downside has been a key problem for deep-submicron (DSM) VLSI design automation. Meanwhile, as CMOS continues scaling to 45nm and beyond, energy is becoming a key limiting issue, together with different nanometer physical effects (corresponding to noise and reliability) and manufacturing constraints. All these make nanometer VLSI designs extraordinarily advanced. Intelligent pc-aided design (CAD) and optimization tools are essential to providing the perfect overall system efficiency, energy, reliability, and manufacturability.
Courses in Regular ECE Program
The ICSG faculty teach courses at the undergraduate and graduate ranges that span the whole house of IC design and design methodology.
UNDERGRADUATE
EE338L
Analysis and design of analog integrated circuits; transistor fashions, built-in circuit applied sciences; format techniques; mismatches; easy and advanced current mirrors, single-stage amplifiers; differential-pair amplifiers; frequency response; noise concerns; feedback; nonlinear circuits; cascode amplifiers; telescopic and folded-cascode operational amplifiers; two-stage operational amplifiers utilizing state-of-the-art EDA/CAD instruments for design simulation and format.
EE360M
DIGITAL Programs DESIGN Utilizing VHDL
Hardware implementation of arithmetic and other algorithmic processes; hardware description languages (VHDL); group, design, and simulation of digital techniques.
EE360R
Pc-AIDED INTEG CIRCUIT DESIGN
Concept and observe of built-in circuit design. 10M16DAF484I6G of chip design, chip partitioning, and architecture; pc-aided design tools for simulation and bodily design
EE360S
DIGITAL Built-in CIRCUIT DESIGN
Circuit-degree points of steel oxide silicon (MOS) and bipolar built-in circuit applied sciences. Logic gates and latches; propagation delays; circuit simulation fashions.
EE379K
ANALOG ICS FOR COMMUNICATION Programs
Device fashions, small-signal circuit analysis, noise and distortion in devices and circuits, including relevant metrics; biasing strategies, voltage references, current sources and biasing for low-noise applications; amplifier design methods for low noise, variable gain amplifiers, energy amplifiers; built-in mixers; and built-in oscillators.
GRADUATE Courses
EE382M-1
VLSI TESTING
Hardware and software reliability evaluation of digital programs; testing, design for testability, self-prognosis, fault-tolerant logic design, error-detecting and error-correcting codes.
EE382M-10
SYNTHESIS OF DIGITAL Techniques
Automatic generation of gate-degree implementations from HDL specs; optimization of two-stage, multilevel, and sequential circuits for area, speed, and testability.
EE382M-11
VERIFICATION OF DIGITAL Techniques
Automated verification of digital techniques; formal fashions and specs, equivalence checking, design verification, temporal logic, BDDs, logical foundations, automata theory, current developments
EE382M-12
SYSTEM DESIGN METRICS
Analysis of design at chip, board, and system ranges; life cycle implications of design choices, including design for testability results on manufacturing and subject service; financial and buyer-driven components
EE382M-14
ANALOG Integrated CIRCUIT DESIGN
Design and implementation of analog built-in circuits (ICs) focusing on transistor-degree design of circuits utilizing the trendy semiconductor fabrication processes, notably CMOS. The blocks and circuit architectures discussed on this course are the core elements of most integrated systems and important in applications akin to communications, multimedia, imaging, sensors, and biomedical.
EE382M-2
Dependable COMPUTING
Design methods for dependable, fault-tolerant, fail-protected and fail-delicate systems; fault prognosis and fault avoidance strategies at program and system ranges; experimental and industrial fault-tolerant computer techniques.
EE382M-7
VLSI TESTING:
VLSI I: CMOS expertise; structured digital circuits; VLSI systems; computer-aided design tools and principle for design automation; chip design.
EE382M-8
VLSI II
Microelectronic methods structure; VLSI circuit testing methods; integration of heterogeneous pc-aided design instruments; wafer scale integration; advanced excessive-pace circuit design and integration.
Radio Frequency Built-in Circuit Design
Design and analysis of RF and analog ICs, together with an outline of noise and distortion in devices and circuits; biasing strategies including voltage references, present sources and biasing for low-noise functions; amplifier design methods for low noise, variable acquire, excessive output energy and high dynamic range; integrated mixers and other frequency converters; rectifier circuits; and built-in oscillators for generating fastened and variable frequencies.
CAD DEEP SUB
Overview of the CAD move; fundamentals of logic synthesis; graph theory and computational complexity; partitioning; floorplanning and placement; international and detailed routing; static timing analysis and delay modeling; timing closure and physical synthesis; noise sources in timing evaluation and PD; CAD for manufacturability; statistical timing evaluation and statistical circuit optimization
NANOSCALE IC DESIGN
CMOS technology and design scaling; nanometer transistors and their models; design time energy optimization (circuit-level techniques, structure, interconnect, reminiscence); standby-mode power optimization (circuits and systems, reminiscence); runtime power optimization (circuits and programs); sources of variability; statistical information assortment and analysis of variance; statistical circuit simulation and timing analysis; manufacturability and decision enhancement methods.
EE382V:
SYSTEM-ON-A-CHIP DESIGN-ICS
Concepts, points, and means of system-level design of embedded programs, i.e., hardware-software program co-design & co-verification; modeling and specification of an embedded system at a excessive stage of abstraction; use of co-simulation to validate system performance; analysis of purposeful and nonfunctional efficiency of the system early in the design process to support design choices; evaluation of hardware/software tradeoffs, algorithms, and architectures to optimize the system based mostly on requirements and implementation constraints.
EMBEDDED SYSTEM DESIGN AND MODELING
This course presents state-of-the-artwork methods, instruments and methods for system-degree design and modeling of complete multi-processor systems from specification all the way down to implementation across hardware-software boundaries. Utilizing the SpecC language and the System-On-Chip Environment (SCE), we'll specify, simulate, analyze, model and design systems primarily based on examples of typical embedded purposes.
VLSI Bodily DESIGN AUTOMATION
Fundamentals of bodily design, the technique of reworking structural illustration of a VLSI system into structure illustration. This course focuses on design automation issues together with: logic partitioning, floorplanning, placement, world routing, detailed routing, clock and power routing, and new developments in bodily synthesis. Optimization methods, corresponding to graph principle, community flow, Steiner tree, simulated annealing, generic algorithm, and linear/convex programming are also coated.
EE382V
OPTIMIZATION Points IN VLSI CAD
As CMOS scales into deep submicron dimensions, VLSI designs are interconnect-dominated for the overall chip performance, cost, and reliability. The resulting design closure downside has been a key problem for deep-submicron (DSM) VLSI design automation. Meanwhile, as CMOS continues scaling to 45nm and beyond, energy is becoming a key limiting issue, together with different nanometer physical effects (corresponding to noise and reliability) and manufacturing constraints. All these make nanometer VLSI designs extraordinarily advanced. Intelligent pc-aided design (CAD) and optimization tools are essential to providing the perfect overall system efficiency, energy, reliability, and manufacturability.
